
B-8
Ladder Logic (LAD) for S7-300 and S7-400
C79000-G7076-C504-02
MW100
M0.2 T 1
SE
S5T#250MS
M0.2
Network 1: If the signal state of timer T 1 is 0, load the time value 250 ms into T 1 and start T 1 as
an extended-pulse timer.
Network 4: When the timer T1 expires, the memory word 100 is incremented by “1”.
ADD_I
IN1
ENOEN
IN2
OUT
MW100
1
MW100
Network 5: The MOVE instruction allows you to output the different clock frequencies at
outputs Q12.0 through Q 13.7.
MOVE
IN
ENOEN
OUT AW12
M001
T 1
Network 2: The state of the timer is saved temporarily in an auxiliary memory marker.
N001
JMP
Network 3: If the signal state of timer T is “1”, jump to jump label N001.
M0.2
Figure B-5 Ladder Logic to Generate a Clock Pulse
Programming Examples
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