Siemens NAN 67 Series Manual de servicio descargar pdf (Pagina 231)

100

101

19-7

Ladder Logic (LAD) for S7-300 and S7-400

C79000-G7076-C504-02

19.5 Exception Bit Overflow

You can use the Exception Bit Overflow instruction to recognize an overflow

(OV) in the last math function. If, after the system executes a math function,

the result is outside the permissible negative range or outside the permissible

positive range, the OV bit in the status word (see Section 6.3) is set. The

instruction checks the signal state of this bit. This bit is reset by error-free

running math functions.

When used in series, this instruction combines the result of its check with the

previous result of logic operation according to the And truth table

(see Section 6.2 and Table 6-8). When used in parallel, this instruction

combines the result of its check with the previous RLO according to the Or

truth table (see Section 6.2 and Table 6-9).

Figure 19-7 Exception Bit Overflow Element and Its Negated Form

Description

The Element and

Its Negated Form

Status Bit Instructions

1 2 ... 226 227 228 229 230 231 232 233 234 235 236 ... 317 318

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