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13-4
Ladder Logic (LAD) for S7-300 and S7-400
C79000-G7076-C504-02
Status Word Bits
BR CC 1 CC 0 OV OS OR STA RLO FC
Write – x x 0 – x 1 x 1
I 0.1
Output Q 4.0 is set if the following
conditions exist:
S There is a signal state of 1 at
inputs I 0.0 and at I 0.1
S And MD0 = MD4
S And there is a signal state of 1 at
input I 0.2
Q 4.0
CMP
== D
IN2MD4
IN1MD0
I 0.0 I 0.2
S
Comparison is true:
Figure 13-2 Compare Double Integer
Comparison Instructions
- Ladder Logic (LAD) 1
- Programming 1
- Editor 6
- Contents 10
- C79000-G7076-C504-02 14
- Product Overview 15
- Introduction 17
- S Organization blocks (OBs) 20
- S Function blocks (FBs) 20
- S Functions (FCs) 20
- S Data blocks (DBs) 20
- 2.3 Rules to Observe 23
- Creating Logic Blocks 25
- (optional) 38
- S Comparison boxes 39
- S Midline outputs (#) 39
- 3.9 Entering Ladder Elements 42
- 3.12 Symbolic Addressing 48
- Data Types 53
- 4.2 Selecting a Method 56
- TAB or RETURN keys. At 57
- DB17 - <Offline> 58
- Figure 4-6 Declaring a UDT 61
- Insert 61
- S Select File 64
- STL. You must then convert 66
- FB6-<Online> 70
- 6.1 Elements and Boxes 76
- CPU manual 79
- Addressing 93
- 7.1 Overview 94
- 7.2 Types of Addresses 96
- 8.1 Overview 100
- 8.2 Normally Open Contact 101
- 8.3 Normally Closed Contact 102
- 8.4 Output Coil 103
- 8.5 Midline Output 104
- 8.6 Invert Power Flow 105
- 8.7 Save RLO to BR Memory 106
- 8.8 Set Coil 107
- 8.9 Reset Coil 108
- 8.10 Set Counter Value 109
- 8.11 Up Counter Coil 110
- 8.12 Down Counter Coil 111
- 8.13 Pulse Timer Coil 112
- Bit Logic Instructions 113
- 8.15 On-Delay Timer Coil 114
- 8.17 Off-Delay Timer Coil 116
- 8.22 Set Reset Flipflop 121
- 8.23 Reset Set Flipflop 122
- Timer Instructions 123
- S Timer instructions 124
- S W#16#wxyz 124
- S S5T# aH_bbM_ccS_ddMS 124
- 9.2 Choosing the Right Timer 126
- 9.3 Pulse S5 Timer 127
- 9.4 Extended Pulse S5 Timer 129
- 9.5 On-Delay S5 Timer 131
- 9.7 Off-Delay S5 Timer 135
- Counter Instructions 137
- 10.2 Up-Down Counter 139
- 10.3 Up Counter 141
- 10.4 Down Counter 143
- Integer Math Instructions 145
- 11.1 Add Integer 146
- 11.2 Add Double Integer 147
- 11.3 Subtract Integer 148
- 11.4 Subtract Double Integer 149
- 11.5 Multiply Integer 150
- 11.6 Multiply Double Integer 151
- 11.7 Divide Integer 152
- 11.8 Divide Double Integer 153
- Instructions 155
- Chapter Overview 157
- 12.1 Overview 158
- Description 164
- Floating-Point Numbers 169
- Comparison Instructions 173
- 13.1 Compare Integer 174
- 13.2 Compare Double Integer 175
- S And MD0 = MD4 176
- 14.1 Assign a Value 180
- 14.2 BCD to Integer 182
- 14.3 Integer to BCD 183
- 14.5 BCD to Double Integer 185
- 14.6 Double Integer to BCD 186
- 14.8 Ones Complement Integer 188
- 14.10 Twos Complement Integer 190
- 14.13 Round to Double Integer 193
- 14.15 Ceiling 195
- 14.16 Floor 196
- Word Logic Instructions 197
- 15.1 Overview 198
- 15.2 WAnd Word 199
- 15.3 WAnd Double Word 200
- 15.4 WOr Word 201
- 15.5 WOr Double Word 202
- 15.6 WXOr Word 203
- 15.7 WXOr Double Word 204
- Shift and Rotate Instructions 205
- 16.1 Shift Instructions 206
- 16.2 Rotate Instructions 214
- Data Block Instructions 217
- Jump Instructions 219
- 18.1 Overview 220
- Instructions 221
- 18.5 Label 224
- Status Bit Instructions 225
- 19.1 Overview 226
- 19.2 Exception Bit BR Memory 227
- 19.3 Result Bits 228
- 19.4 Exception Bits Unordered 230
- 19.5 Exception Bit Overflow 231
- Program Control Instructions 235
- 20.3 Return 241
- Reference Manual 244
- Appendix 249
- Programming Examples 267
- B.1 Overview 268
- B.2 Bit Logic Instructions 269
- B.3 Timer Instructions 273
- B.5 Integer Math Instructions 279
- B.6 Word Logic Instructions 280
- Number Notation 283
- C.1 Number Notation 284
- S (3.141593) 289
- References 293
- Reference 294
- Glossary 295
- S Result of a math operation 296
- S Result of a comparison 296
- S Elementary data types 297
- S Complex data types 297
- S Load memory 300
- S Work memory 300
- S System memory 300
- Index-12 316
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