
9-8
Ladder Logic (LAD) for S7-300 and S7-400
C79000-G7076-C504-02
Figure 9-4 shows the Extended Pulse S5 Timer instruction, describes the
status word bits, and shows the pulse timer characteristics. Certain
restrictions apply to the placement of timer boxes (see Section 6.1).
–– t –– –– t –– –– t ––
t = programmed time
Status Word Bits
Timing Diagram
BR CC 1 CC 0 OV OS OR STA RLO FC
Write – – – – – x x x 1
If the signal state of input I 0.0 changes from 0 to 1
(that is, there is a positive edge in the RLO), timer T 5
is started. The timer continues to run with the
specified time of two seconds (2s) without regard to a
negative edge at input S. If the signal state of
input I 0.0 changes from 0 to 1 before the time has
elapsed, the timer is restarted. If the signal state of
input I 0.1 changes from 0 to 1 while the timer is
running, the timer is reset. The signal state of output
Q 4.0 is 1 as long as the timer is running (see also
Section 9.3).
I 0.0
T 5
S_PEXT
R
Q
TV BI
BCD
S5T# 2s
I 0.1
Q 4.0
S
RLO at S input
RLO at R input
Timer running
Signal state check for 1
Signal state check for 0
Figure 9-4 Extended Pulse S5 Timer
Example
Timer Instructions
Comentarios a estos manuales