
A-4
Ladder Logic (LAD) for S7-300 and S7-400
C79000-G7076-C504-02
Table A-1 Ladder Logic Instructions Arranged Alphabetically by International Name, with Short Names, cont.
Full Name Page No.Short Name
Result Bit Less Equal 0 <=0 –––| |––– 19-4
Result Bit Less Than 0 <0 –––| |––– 19-4
Result Bit Not Equal 0 <>0 –––| |––– 19-4
Retentive On-Delay S5 Timer S_ODTS 9-11
Retentive On-Delay Timer Coil –––( SS ) 8-17
Return –––(RET) 20-7
Return Fraction Double Integer MOD 11-10
Rotate Left Double Word ROL_DW 16-10
Rotate Right Double Word ROR_DW 16-12
Round to Double Integer ROUND 14-15
Save RLO to BR Memory –––( SAVE ) 8-8
Set Coil –––( S ) 8-9
Set Counter Value –––( SC ) 8-11
Set-Reset Flipflop SR 8-23
Shift Left Double Word SHL_DW 16-4
Shift Left Word SHL_W 16-2
Shift Right Double Integer SHR_DI 16-9
Shift Right Double Word SHR_DW 16-6
Shift Right Integer SHR_I 16-7
Shift Right Word SHR_W 16-5
Subtract Double Integer SUB_DI 11-5
Subtract Integer SUB_I 11-4
Subtract Real SUB_R 12-4
Truncate Double Integer Part TRUNC 14-16
TWOs Complement Double Integer NEG_DI 14-13
TWOs Complement Integer NEG_I 14-12
Up Counter S_CU 10-5
Up Counter Coil –––( CU ) 8-12
Up-Down Counter S_CUD 10-3
(Word) And Double Word WAND_DW 15-4
(Word) And Word WAND_W 15-3
(Word) Exclusive Or Double Word WXOR_DW 15-8
(Word) Exclusive Or Word WXOR_W 15-7
(Word) Or Double Word WOR_DW 15-6
(Word) Or Word WOR_W 15-5
Alphabetical Listing of Instructions
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