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Addressing

3-9

ET 200S IM 151-7 CPU Interface Module

A5E00058783-04

Sample Program

Below you will see a sample program for data interchange between the DP master

and the DP slave.

You can find the addresses in Table 3-3.

SFCs 14 and 15 are called by specifying the logical address in hexadecimal

format.

In the IM 151-7 CPU

Data preprocessing in the DP slave:

TMB6

LIB0

TMB7

Load actual value 2 and

transfer to memory byte 6.

Load input byte 0 and

transfer to memory byte 7.

Forward data to DP master

LMW6

T PQW 136

Load memory word 6 and

transfer to peripheral output word 136

In the DP Master CPU

Postprocess received data in the DP master:

L PIB 50

TMB60

L PIB 51

L B#16#3

+ I

TMB61

Load peripheral input byte 50 and

transfer to memory byte 60.

Load peripheral input byte 51 and

load byte 3;

add the values as integer data type and

transfer the result to memory byte 61.

Data preprocessing in the DP master:

L10

TMB67

Load actual value 10 and

add 3,

transfer the result to memory byte 67.

Send the data (memory bytes 60 to 67) to the DP slave:

CALL SFC 15

LADDR:= W#16#12C

RECORD:= P#M60.0 Byte8

RET_VAL:=MW 22

Call system function 15:

Write the data to the output address area as of

address 300 (12C hexadecimal) with a length of 8

bytes as of memory byte 60.

In the IM 151-7 CPU

Receive data from the DP master (stored in MB 30 to 37):

CALL SFC 14

LADDR:= W#16#84

RET_VAL:=MW 20

RECORD:=P#M30.0 Byte8

Call system function 14:

Write the data from the input address area as of

address 132 (84 hexadecimal) with a length of 8

bytes to memory byte 30.

Postprocess received data:

LMB30

LMB37

+ I

T MW 100

Load memory byte 30 and

load memory byte 37;

add the values as integer data type and

transfer the result to memory byte 100.

1 2 ... 52 53 54 55 56 57 58 59 60 61 62 ... 213 214

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