
Technical Specifications
10-5
ET 200S IM 151-7 CPU Interface Module
A5E00058783-04
Technical specifications
CPU and product version
MLFB 6ES7 151-7AA10-0AB0
Hardware version 02
Firmware version V2.1.0
Matching
programming
package
STEP 7 starting with
V5.1 + SP6 (for
IM 151-7 CPU)
Optional:
– S7-SCL
– S7-GRAPH
STEP 7 as of
V5.2 + SP1 (for
IM 151-7 CPU with
the DP master
module)
Memory
Working memory
Integral 48 kBytes
Expandable No
Load memory: Plug-in
(MMC up to 8 MB)
Data storage on the
MMC
(after the last
programming)
At least 10 years
Backup Guaranteed by MMC
(maintenance-free)
Processing times
Processing times for
Bit instructions Min. 0.1 µs
Word instructions Min. 0.2 µs
Fixed-point math
instructions
Min. 2 µs
Floating-point math
instructions
Min. 6 µs
Timers, counters and their retentive features
S7 counters 256
Retentivity Adjustable
Preset From C 0 to C 7
Counting range 0 to 999
IEC counters Yes
Number Unlimited
(limited only by the
working memory)
Type SFB
S7 timers 256
Retentivity Adjustable
Preset No retentive timers
Timing range 10 ms to 9990 s
IEC timers Yes
Number Unlimited
(limited only by the
working memory)
Type SFB
Data areas and their retentive features
Total retentive data area
(incl. memory markers,
timers, counters)
All
Memory markers 256 bytes
Retentivity Adjustable
Preset MB 0 to MB 15
Clock memory 8 (1 memory byte)
Data blocks Max. 511 (DB 0
reserved)
Size Max. 16 kByte
Local data per priority
class
Max. 510 bytes
Blocks
Total 1024
(FBs + FCs + DBs)
FBs Max. 512
Size Max. 16 kBytes
FCs Max. 512
Size Max. 16 kBytes
DBs Max. 511
Size Max. 16 kBytes
OBs See Instruction list
Size Max. 16 kByte
Nesting depth:
Per priority class 8
Additional levels
within an error OB
4
Address areas (inputs/outputs)
Total I/O address area Max.
2048 bytes/2048 bytes
Process image 128 bytes/128 bytes
(not adjustable)
Digital channels Max. 16336/16336
Central 248/248
Analog channels Max. 1021/1021
Central 124/124
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