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IP 240 Operation

If several IP 240 modules use one interrupt circuit, the current interrupt source must be

determined by reading the interrupt request bytes of all modules or by additonally evaluating I/O

byte 0. This must be taken into account in the STEP 5 program due to the system characteristics of

the S5-115U CPUs ( Section 5.1.2).

Note

• In the S5-115U, S5-135U and S5-155U, only one of the coding switches S2.1 to

S2.4 may be closed at any given time. In the S5-150U, these switches must

always be set to ”off”.

• If the 6ES5 434-7LA11 digital input module is used in the S5-115U, interrupt

circuit IRA is already reserved and is no longer available for IP 240 modules.

• In the S5-135U, interrupt-driven program processing must be level-triggered

(this corresponds to the basic settings in DX 0).

• In the S5-155U (155U mode), the selected interrupt circuit must be set on the

CPU 946 and enabled additionally in DX 0.

5.1.2 I/O Byte 0 (PY)

In the S5-150U and S5-155U programmable controllers (in the 150 U mode), an interrupt request

from up to eight modules is detected by reading I/O byte 0. Evaluation of I/O byte 0 in IP 240 mo-

dules is possible only when theses modules are addressed in the P area.

For interrupt generation over an IRx interrupt circuit, the additional evaluation of I/O byte 0

enables the use of one interrupt circuit for several IP 240s.

Interrupt generation with I/O byte 0

Each bit in I/O byte 0 can be reserved by one module with interrupt capablity. Switches S1.1 to

S1.8 on switchbank S1 are available on the IP 240 for this purpose. By defining which bit is to be

set for an interrupt signal on the module, the priority can be determined with which the interrupt

request is processed if two or more interrupt requests are pending simultaneously. Bit 0.0 has the

highest priority and bit 0.7 the lowest.

The module with the highest priority (I/O byte 0.0) is declared to be the master module of the

programmable controller. It is used to mask all unassigned bits of I/O byte 0. If an IP 240 is used as

the master module, switch S1.1 must be closed (”on” position). Only one other switch on

switchbank S1 may be set to ”on” to mask the unassigned bits in the I/O byte 0. If several bits in

I/O byte 0 are unassigned, the interrupt OBs for the non-masked bits may not be programmed.

On the remaining IP 240 modules, designated as slaves, the switch for the corresponding bit in

I/O byte 0 and switch S2.7 must be closed ("on" setting). All other switches on bank S1 must be set

to the ”off” position.

Switch S2.8 must be closed on both master and slave modules to enable interrupt generation via

the I/O byte 0. Only then does the IP 240 make data available when the S5 CPU reads I/O byte 0.

EWA 4NEB 811 6120-02

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Siemens IP-Module Especificaciones Pagina 411