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Semiconductor Group 7-10

Interrupt System

C501

7.4 External Interrupts

The external interrupts 0 and 1 can be programmed to be level-activated or negative-transition

activated by setting or clearing bit IT0, respectively in register TCON. If ITx = 0 (x = 0 or 1), external

interrupt x is triggered by a detected low level at the INTx

pin. If ITx = 1, external interrupt x is

negative edge-triggered. In this mode, if successive samples of the INTx

pin show a high in one

cycle and a low in the next cycle, interrupt request flag IEx in TCON is set. Flag bit IEx=1 then

requests the interrupt.

If the external interrupt 0 or 1 is level-activated, the external source has to hold the request active

until the requested interrupt is actually generated. Then it has to deactivate the request before the

interrupt service routine is completed, or else another interrupt will be generated.

The external timer 2 reload trigger interrupt request flag EXF2 will be activated by a negative

transition at pin P1.1/T2EX but only if bit EXEN2 is set.

Since the external interrupt pins are sampled once in each machine cycle, an input high or low

should be held for at least 6 oscillator periods to ensure sampling. lf the external interrupt is

transition-activated, the external source has to hold the request pin high for at least one cycle, and

then hold it low for at least one cycle to ensure that the transition is recognized so that the

corresponding interrupt request flag will be set (see figure 7-27). The external interrupt request

flags will automatically be cleared by the CPU when the service routine is called.

Figure 7-27

External Interrupt Detection

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Siemens EF 88H Series Manual de usuario Pagina 88