
Introduction
C501
Semiconductor Group 1-1
1 Introduction
The C501-L, C501-1R, and C501-1E described in this document are compatible (also pin-
compatible) with the 80C52 and can be used in typical 80C52 applications.
The C501-1R contains a non-volatile 8K×8 read-only program memory, a volatile 256×8 read/write
data memory, four ports, three 16-bit timers/counters, a seven source, two priority level interrupt
structure and a serial port. The C501-L is identical, except that it lacks the program memory on
chip. The C501-1E contains a one-time programmable (OTP) program memory on chip. The term
C501 refers to all versions within this specification unless otherwise noted.
Figure 1-1
C501G Functional Units
MCA03238
Port 0
Port 1
Port 2
Port 3
RAM
256 x 8
CPU
T0
T1
USART
Ι
Power
Saving
8K x 8 OTP (C501-1E)
T2
Modes
8K x 8 ROM (C501-1R)
/O
/O
Ι
Ι
/O
Ι
/O
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