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Interrupt System

C501

Semiconductor Group 7-7

7.2 Interrupt Priority Level Structure

A low-priority interrupt can itself be interrupted by a high-priority interrupt, but not by another low-

priority interrupt. A high-priority interrupt cannot be interrupted by any other interrupt source.

If two requests of different priority level are received simultaneously, the request of higher priority is

serviced. If requests of the same priority are received simultaneously, an internal polling sequence

determines which request is serviced. Thus within each priority level there is a second priority

structure determined by the polling sequence as shown in table 7-8 below:

Table 7-8

Priority-within-Level Structure

Interrupt Source Priority

External Interrupt 0, IE0

Timer 0 Interrupt, TF0

External Interrupt 1, IE1

Timer 1 Interrupt, TF1

Serial Channel, RI or TI

Timer 2 Interrupt, TF2 or EXF2

High

↓

Low

1 2 ... 80 81 82 83 84 85 86 87 88 89 90 ... 120 121

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Siemens EF 88H Series Manual de usuario Pagina 85