Siemens EF 88H Series Manual de usuario Pagina 103

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Device Specifications
C501
Semiconductor Group 10-6
AC Characteristics for C501-L / C501-1R / C501-1E (cont’d)
External Data Memory Characteristics
External Clock Drive Characteristics
Parameter Symbol Limit Values Unit
12 MHz
Clock
Variable Clock
1/
t
CLCL
= 3.5 MHz to 12 MHz
min. max. min. max.
RD
pulse width t
RLRH
400 6t
CLCL
– 100 ns
WR
pulse width t
WLWH
400 6t
CLCL
– 100 ns
Address hold after ALE
t
LLAX2
30 t
CLCL
– 53 ns
RD
to valid data in t
RLDV
252 5t
CLCL
– 165 ns
Data hold after RD
t
RHDX
00–ns
Data float after RD
t
RHDZ
–97 2t
CLCL
– 70 ns
ALE to valid data in
t
LLDV
517 8t
CLCL
– 150 ns
Address to valid data in
t
AVDV
585 9t
CLCL
– 165 ns
ALE to WR
or RD t
LLWL
200 300 3t
CLCL
– 50 3t
CLCL
+ 50 ns
Address valid to WR
or RD t
AVWL
203 4t
CLCL
– 130 ns
WR
or RD high to ALE high t
WHLH
43 123 t
CLCL
– 40 t
CLCL
+ 40 ns
Data valid to WR
transition t
QVWX
33 t
CLCL
– 50 ns
Data setup before WR
t
QVWH
433 7t
CLCL
– 150 ns
Data hold after WR
t
WHQX
33 t
CLCL
– 50 ns
Address float after RD
t
RLAZ
0–0ns
Parameter Symbol Limit Values Unit
Variable Clock
Freq. = 3.5 MHz to 12 MHz
min. max.
Oscillator period
t
CLCL
83.3 285.7 ns
High time
t
CHCX
20 t
CLCL
t
CLCX
ns
Low time
t
CLCX
20 t
CLCL
t
CHCX
ns
Rise time
t
CLCH
–20ns
Fall time
t
CHCL
–20ns
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