
Device Specification
Semiconductor Group 7-34
Compare/Capture Unit (CCU)
The compare/capture unit is a complex timer/register array for applications that require high
speed I/O pulse width modulation and more timer/counter capabilities.
The CCU contains
– one 16-bit timer/counter (timer2) with 2-bit prescaler, reload capability and a max. clock
frequency of f
OSC/12
(1 MHz with a 12 MHz crystal).
– one 16-bit timer (compare timer) with 8-bit prescaler, reload capability and a max. clock
frequency of f
OSC/2
(6 MHz with a 12 MHz crystal).
– fifteen 16-bit compare registers.
– five of which can be used as 16-bit capture registers.
– up to 21 output lines controlled by the CCU.
– nine interrupts which can be generated by CCU-events.
Figure 5 shows a block diagram of the CCU. Eight compare registers (CM0 to CM7) can
individually be assigned to either timer 2 or the compare timer. Diagrams of the two timers are
shown in figures 6 and 7. The four compare/capture registers, the compare/reload/capture
register and the comset/comclr register are always connected to timer 2. Depending on the
register type and the assigned timer three different compare modes can be selected.
Table 3 illustrates possible combinations and the corresponding output lines.
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