Siemens EF 88H Series Manual de usuario descargar pdf (Pagina 28)

Semiconductor Group 4 - 3

The power down state is maintained while pin HWPD is held active. If HWPD goes to high level

(inactive state) an automatic start up procedure is performed:

– First the pins leave their floating condition and enter their default reset state as they

had immediately before going to float state.

– Both oscillators are enabled (only if OWE = high). While the on-chip oscillator (with

pins XTAL1 and XTAL2) usually needs a longer time for start-up, if not externally driven (with

crystal approx. 1 ms), the oscillator watchdog's RC oscillator has a very short start-up time

(typ. less than 2 microseconds).

– Because the oscillator watchdog is active it detects a failure condition if the on-chip

oscillator hasn't yet started. Hence, the watchdog keeps the part in reset and supplies the

internal clock from the RC oscillator.

– Finally, when the on-chip oscillator has started, the oscillator watchdog releases the

part from reset after it performed a final internal reset sequence and switches the clock supply

to the on-chip oscillator. This is exactly the same procedure as when the oscillator watchdog

detects first a failure and then a recovering of the oscillator during normal operation.

Therefore, also the oscillator watchdog status flag is set after restart from Hardware Power

Down Mode.

When automatic start of the watchdog was enabled (PE

/SWD connected to V

), the

Watchdog Timer will start, too (with its default reload value for time-out period).

The SWD-Function of the PE

/SWD Pin is sampled only by a hardware reset. Therefore at least one

Power On Reset has to be performed.

System Reset

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Siemens EF 88H Series Manual de usuario Pagina 28