
Semiconductor Group 5 - 1
On-Chip Peripheral Components
5 On-Chip Peripheral Components
5.1 Digital I/O Port Circuitry
To realize the Hardware Power Down Mode with floating Port pins in the SAB 80C517A/83C517A 5
the standard port structure used in the 8051 Family is modified (figure 5-1).
The FETs p4, p5 and n2 are added. During Hardware Power Down this FETs disconnect the port
pins from internal logic.
Figure 5-1
Port Structure
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