
Semiconductor Group 4 - 8
4.3 Fast internal Reset after Power-On
The SAB 80C517A can use the oscillator watchdog unit for a fast internal reset procedure after
power-on.
Figure 4-4 shows the power-on sequence under control of the oscillator watchdog.
Normally the devices of the 8051 family (like the SAB 80C517) enter their default reset state not
before the on-chip oscillator starts. The reason is that the external reset signal must be internally
synchronized and processed in order to bring the device into the correct reset state. Especially if a
crystal is used the start up time of the oscillator is relatively long (typ. 1ms). During this time period
the pins have an undefined state which could have severe effects especially to actuators connected
to port pins.
In the SAB 80C517A the oscillator watchdog unit can avoid this situation. For doing this, the
oscillator watchdog must be enabled. In this case, after power-on the oscillator watchdog’s RC
oscillator starts working within a very short start-up time (typ. less than 2 microseconds). In the
following the watchdog circuitry detects a failure condition for the on-chip oscillator because this has
not yet started (a failure is always recognized if the watchdog’s RC oscillator runs faster than the
on-chip oscillator). As long as this condition is detected the watchdog uses the RC oscillator output
as clock source for the chip rather than the on-chip oscillator’s output. This allows correct resetting
of the part and brings also all ports to the defined state (see figure 4-4, I). The time period from
power-on till reaching the reset state at the ports adds from the following terms:
– RC oscillator start-up < 2 µs
– synchronization of the RC oscillators divider-by-5 < 6 T
– synchronization of the state and cycle counters < 6 T
– reset procedure till correct port states are reached < 12T
Delay between power-on and correct reset state:
Typ.: 18 µs
Max.: 34 µs
System Reset
Comentarios a estos manuales