
32 Texas Instruments Communication Driver Manual
Bit Writes with Ladder Logic – 405 Series
The Texas Instruments Hostlink Protocol does not permit an external intelligent device to directly alter
the state of a single bit without over-writing the entire byte in which that bit exists. As a result, the
Operator Station will write values to designated registers in the PLC, specifying which bit should be
set or cleared. It is necessary to write a section of Ladder Logic/Stage Programming to interpret this
value in order to change the appropriate bit. The Operator Station will write to four V memory
registers to set or reset a bit. The four registers will be consecutive starting with the Bit Write register
entered in the PLC ID field. If a Bit Write register is not entered, the register will default to V7374.
When the default register is used, V7374, V7375, V7376 and V7377 will be used to accomplish the
Bit Writes.
Register 1 This register contains a 16-bit mask in which the bit position to be set will be set to 1 and
all other bits will be set to 0.
Register 2 Each memory type has a corresponding V memory address. Register 2 contains the V
memory address in which the bit to be set is located.
Register 3 This register contains a 16-bit mask in which the bit position to be reset will be set to 0
and all other bits will be set to 1.
Register 4 This register contains the V memory address in which the bit to be reset is located.
PLC ID
The format for the PLC ID for TI 405 will include both the PLC ID and a memory register used for the
four Bit Write registers. The format will be the PLC ID followed by the memory address.
XX-VYYYYY or XX-YYYYY or XX
Where
XX PLC ID in range 1 - 90
- PLC ID/memory address separator
V Optional memory type specifier
YYYYY Optional starting with V memory address in range 1400 -7374
If a memory address is not entered, the Bit Write register will default to V7374. The following ladder
logic rungs may be added to a TI 405 program for the purpose of setting and clearing individual bits.
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